1. 華南理工大學(xué)研究生課題:硅通孔(TSV) 結(jié)構(gòu)三維系統(tǒng)封裝(SiP) 的熱-力可靠性分析2. 廣東省大學(xué)生創(chuàng)新實(shí)驗(yàn)項(xiàng)目:多孔磁性形狀記憶合金的創(chuàng)新制備及其顯微組織研究3. 華南理工大學(xué)本科生研究項(xiàng)目:AZ91鎂合金表面稀土復(fù)合化學(xué)鈍化膜制備工藝優(yōu)化與表征4. The Interfacial Thermo-Mechanical Reliability of 3D Memory-Chip Stacking with through Silicon via Array, The 16th International Conference on Electronic Packaging Technology (ICEPT 2015): 2015.08 EI,一作5. Influence of Geometry of Micro-Bump Interconnection Thermal Stress and Fatigue Life of Interconnects in Copper Filled through Silicon via Structure, The 14th International Conference on Electronic Packaging Technology (ICEPT 2013) 2013.08 EI,二作6. 《TSV結(jié)構(gòu)微凸點(diǎn)互連熱疲勞壽命的研究》,2013中國力學(xué)大會,二作